LE1201-XJLink2

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Information about LE1201-XJLink2
bst

Published on January 29, 2016

Author: MarkChien1

Source: slideshare.net

1. LE1201 Standalone Boundary Scan Test (BST) with XJTAG XJLink2 Controller Lorenzo Electronics, LLC

2. Goal • In order to broaden the commercial JTAG controllers that are supported by LE1200/1201 Automatic Test Equipment, an XJTAG XJLink2 was acquired thanks to XJTAG's free trial program. • Existing LE1200/1201 system software are enhanced to handle XJLink2. • Only low level XJLink2 API will be used. • The new LE1201 should pass several existing test setups. Lorenzo Electronics, LLC

3. Standalone BST on FPGA • In this test, Xilinx FPGA chip (center) 4-wire JTAG pins and ground wires are connected XJTAG XJLink2 JTAG port controller (right). • Other FPGA pins connected to LCD control/data bus are controlled by a test program writing Lorenzo-XJLink2 on the LCD display via the associated boundary scan cells. Lorenzo Electronics, LLC

4. sysout screen for a paused test execution • BST execution sysout screen lists the test pattern numbers as well as the associated test program source lines. • Boundary scan pins connected to the LCD data bus are grouped together with the group name: data. Setting up data bus with an ASCII character followed by the pulsing of write signal will latch the character into the LCD display. Lorenzo Electronics, LLC

5. Snippet of a BST output file (*.csv) • Record detailed tri-ctrl/output cells driving states and captured input cells logic states for each test pattern. • Highlighted spreadsheet column CU shows FPGA pin IO_AB4 tri-ctrl/output cells, #547 and #548 respectively, are in active driving states. It's the write signal writing to the LCD one character every 3 test patterns. • The column to the left, column CT, indicates the same FPGA pin input cell check state of X. Test program has opted to ignore the captured input cell logic state. Lorenzo Electronics, LLC

6. • To ensure that the BST fault detection capability, Microchip Technology Inc. Explorer 16 MPU development board is tested with LE1201 and XJLink2 controller. • Previously developed test program pass the MPU boundary scan test – without change or re-compilation. • Fault insertion tests successfully detect the faulty MPU pin. Lorenzo Electronics, LLC

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