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Published on January 9, 2008

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Decimation Filtering For Complex Sigma Delta Analog to Digital Conversion in A Low-IF Receiver:  Decimation Filtering For Complex Sigma Delta Analog to Digital Conversion in A Low-IF Receiver Anjana Ghosh SERC, Indian Institute of Science Bangalore February 2006 Presentation Outline:  Presentation Outline Fundamentals of Receiver Operation Salient features of  ADC Decimation Filtering for Low Pass  ADC Existing literature on decimation for bandpass  modulators Proposed architecture Receiver Architectures: A Heterodyne Receiver:  Receiver Architectures: A Heterodyne Receiver if Low IF Receiver:  Low IF Receiver RF Stage cosct sinct Analog to Digital Conversion Digital Filtering, Baseband Downconversion , Demodulation X Y A B Frequency Downconversion Receiver Block Diagram ADC Sample rate : Effect on Analog Antialias Filter (AAF):  ADC Sample rate : Effect on Analog Antialias Filter (AAF) ADC Quantization Noise:  ADC Quantization Noise Decimation Digital Filter for  ADC :  Decimation Digital Filter for  ADC Purpose of decimation filters : Antialias filtering followed by sample rate reduction Multistage Decimation preferred to single stage Popular structure consists of a Cascaded Integrator comb followed by one or two FIR stages CIC Filter:  CIC Filter Moving Average Filter Z transform Order of the CIC Filter For A Low Pass  ADC :  Order of the CIC Filter For A Low Pass  ADC For a  modulator of order l, a CIC of order l+1 is suitable for antialias filtering in the first stage of decimation This CIC can be used to reduce the sample rate to as low as 4 times the Nyquist sampling rate with negligible SNR degradation (<0.25dB). Further reduction in the sample rate using the CIC will degrade the SNR significantly. CIC Structure (Second Order):  CIC Structure (Second Order) Efficient Polyphase Decomposition of Comb Filter:  Efficient Polyphase Decomposition of Comb Filter Modified SINC:  Modified SINC Noise Transfer Function(NTF) and Signal Transfer Function(STF) :  Noise Transfer Function(NTF) and Signal Transfer Function(STF) Complex Downconversion & Decimation :  Complex Downconversion & Decimation Decimation structure for Band pass & Complex S D modulator:  Decimation structure for Band pass & Complex S D modulator Bandpass S D Complex S D Existing Art : Downconversion of IF signal to Baseband followed by Standard Low Pass Decimation Digital Filter New Decimation Filter Architecture : Motivation:  New Decimation Filter Architecture : Motivation Accepted approach imposes restrictions on the choice of  in order to take advantage of the optimization in the mixing process Compatability with the existing GPS engine New Architecture : Block Diagram:  New Architecture : Block Diagram RF Stage cosct sinct Anti alias Filter and Complex Bandpass  Modulator Digital Baseband X Y Digital Decimation Filters A B Low IF Receiver : Signal Spectrum:  Low IF Receiver : Signal Spectrum c -c 0  - desired signal image signal band c -c 0  - 1/2 c -c 0  - j/2 -j/2 RF C (cosct) S (sinct) if -if 0  - 1/2 A=IP*C if -if 0  - j/2 B=IP*S -j/2 if -if 0  - 1 IF c + if c - if -c -if -c + if RF Stage cosct sinct A B Use of Complex Digital Filters:  Use of Complex Digital Filters c -c 0  - desired signal image signal band IP if -if 0  - 1/2 A=IP*cosct if -if 0  - j/2 B=IP*Sinct -j/2 c + if c - if -c -if -c + if if -if 0  - P=X+jY X=A* Y=B* if -if 0  - Q=X-jY Noise Transfer Function Noise Transfer Function DF1 Transfer Function DF2 Transfer Function if -if 0  - OP 1 RF Stage cosct sinct A Anti alias Filter and Complex Sigma Delta Modulator OP j -j DF1 (Complex Digital Filter) X Y P Q DF2 (Complex Digital Filter) Complex Digital Filters : Real Filters From Complex Filters:  Complex Digital Filters : Real Filters From Complex Filters HDF1(z) = HRE(z) - j.HIM(z) ; HDF2(z) = HRE(z) + j.HIM(z) ; OP = P(z).HDF1(z) + Q(z).HDF2(z) ; =>OP = [X(z) +j.Y(z)].[HRE(z) - j.HIM(z)] + [X(z)-j.Y(z)].[HRE(z) + j.HIM(z)] => OP= 2.[X(z). HRE(z) + Y(z). HIM(z)] Thus the Complex Digital Filtering can be accomplished by using two real filters corresponding to the real and imaginary parts of the transfer function of the individual complex filters. if -if 0  - if -if 0  - DF1 Transfer Function DF2 Transfer Function Complex Digital Filters: Implementation:  Complex Digital Filters: Implementation Real Filter Implementation of Digital Filtering, at Low IF. Advantage: Number of Computations reduced from eight to two RF Amp and Filter 90o Antialias Filter and Complex Sigma Delta Modulator cosct sinct real imaginary IP A B S C OP HRE(z) X Y HIM(z) Decimation Filter : Requirements:  Decimation Filter : Requirements antialias filtering and reduction of the sample rate by 16 attenuation of remaining out of band components in the signal generation of a real two sided signal centered around ±wif Multistage Decimation Filter Structure :  Multistage Decimation Filter Structure ADC Output FFT:  ADC Output FFT AAF1: Fourth Order Comb:  AAF1: Fourth Order Comb Passband (3-5MHz) droop = 0.33dB Stopband Attenuation : 83.1dB Aliasing Bands: 59MHz to 69MHz, 123MHz to 128MHz on either side AAF2: 11 Tap HalfBand:  AAF2: 11 Tap HalfBand Passband (3-5MHz) Ripple = 0.0027dB/-0.0054dB Stopband Attenuation : 75.8 dB Aliasing Bands: 27MHz to 32MHz on either side Image Reject Filter :  Image Reject Filter Passband (3-5MHz) Ripple = 0.0027dB/-0.0054dB Stopband Attenuation : 75.8 dB Aliasing Bands: 27MHz to 32MHz on either side Image Reject Filter : Stopband:  Image Reject Filter : Stopband Image Reject Filter : Ripple, Phase Response:  Image Reject Filter : Ripple, Phase Response Passband Droop = 0.94dB Phase Response Droop Correction filter:  Droop Correction filter Net Transfer Function:  Net Transfer Function Decimation Filter Structure:  Decimation Filter Structure FFT of Silicon Data For A Single Tone Input:  FFT of Silicon Data For A Single Tone Input Optimized Architecture : Scope:  Optimized Architecture : Scope Low Pass Complex Band Pass Band Pass Low Pass Scope for optimization :Complex Bandpass? Alternate Architecture : Block Diagram:  Alternate Architecture : Block Diagram Alternate Architecture I:Decimate By 16:  Alternate Architecture I:Decimate By 16 Shifted 4th Order Comb : Stage 1:  Shifted 4th Order Comb : Stage 1 13 tap , 15 bit coefficient quantization ; performs decimation by 4 Passband = 3MHz to 5 MHz Aliasing bands = 67MHz to 69MHz, -59MHz to -61 MHz, -123MHz to -125MHz Shifted 4th Order Comb :Stage 2:  Shifted 4th Order Comb :Stage 2 5tap , 11 bit coefficient quantization;performs decimation by 2 Passband = 3MHz to 5 MHz Aliasing bands = 35MHz to 37MHz, -27MHz to -29 MHz Shifted 4th Order Comb :Stage 3:  Shifted 4th Order Comb :Stage 3 5 tap, 11 bit coefficient quantization; Performs decimation by 2 Passband = 3MHz to 5 MHz Aliasing bands = 19MHz to 21MHz, -11MHz to -13 MHz Image Reject Filter:  Image Reject Filter 5 tap, 15 bit coefficient quantization Passband = 3MHz to 5 MHz Aliasing bands = 19MHz to 21MHz, -11MHz to -13 MHz Optimized Architecture:  Optimized Architecture Multiplier less polyphase implementation CSD coded; multiplier less polyphase implementation Comparison of Transfer Function : Original Architecture and Architecture I:  Comparison of Transfer Function : Original Architecture and Architecture I Comparison of Transfer Function : Original Architecture and Architecture I:  Comparison of Transfer Function : Original Architecture and Architecture I Comparison of Image Rejection Comparison of Passband Ripple Optimized Architecture II:  Optimized Architecture II Low Pass COMB Shifted COMB Decimation Filter Stages in Architecture II :  Decimation Filter Stages in Architecture II Comparison of the Three Architectures :  Comparison of the Three Architectures Summary:  Summary Architecture and design of decimation digital filtering of the output of a complex ∆ modulator for low IF receivers is proposed. Two optimized implementations with variations of the same basic architecture are proposed Reference:  Reference REFERENCES James C Candy and Gabor C Temes, ”Oversampling Methods for A/D and D/A Conversion”, Eugene B Hogenauer, “An Economical Class of Digital Filters for Decimation and Interpolation”, IEEE Transactions on Acoustics,Speech And Signal Processing, Vol ASSP 29,No 2, April 1981 Brian Paul Brandt, “Oversampled Analog to Digital Conversion”, Doctoral Thesis, Stanford University, Electrical Engineering Department, Stanford, California, October 1991 Letizia Lo Presti,” Efficient Modified-Sinc Filters For Sigma Delta A/D Converters”,IEEE Transaction on Circuits and Systems-II:Analog and Digital Signal Processing,Vol 47,No 11,November 2000 Richard Schreier and W Martin Snelgrove,”Decimation For Bandpass Sigma Delta Analog to Digital Conversion”, IEEE International Symposium on Circuits and Systems,1990, 1-3 May, Pages 1801-1804 Vol 3 Stephen Andrew Jantzi, “Quadrature Bandpass Delta Sigma Modulation for Digital Radio”, PhD Thesis, Dept of Electrical and Computer Engineering,University of Toronto Ashok Swaminathan,”A Single-IF Receiver Architecture Using a Complex Sigma-Delta Modulator”, ME thesis, Dept of Electronics, Ottawa-Carleton Institute for Electrical Engineering, Carleton University,Ottawa,Canada Stephen A Jantzi, Kenneth W Martin, Adel S Sedra, “Quadrature Bandpass DS Modulation For Digital Radio”, IEEE Journal Of Solid State Circuits, Vol 32,No 12, December 1997 Asad A Abidi, “Direct Conversion Radio Transceivers For Digital Communications”, IEEE Journal Of Solid State Circuits, Vol 30,No12,December 1995 Jan Crols, Michiel S J Steyaert, ”Low-IF Topologies For High Performance Analog Front Ends of Fully Integrated Receivers”, IEEE Transactions on Circuits And Systems-II: Analog And Digital Signal Processing, Vol 45,No3,March1998 Hong-Kui Yang, W Martin Snelgrove, “High Speed Polyphase CIC Decimation Filters”, IEEE International Symposium on Circuits and Systems, 1996 Yonghong Gao, Lihong Jia, Hannu Tenhunen, “A Partial-Polyphase VLSI Architecture For Very High Speed CIC Decimation Filters”, Twelfth Annual IEEE International ASIC/SOC Conference, 1999 Hassan Aboushady,Yannick Dumonteix, Marie Minverte Louėrat, Habib Mehrez, “Efficient Polyphase Decomposition of Comb Decimation Filters in  Analog to Digital Converters “,IEEE Transactions on Circuits And Systems-II: Analog And Digital Signal Processing, Vol 48,No10,October 2001 Youngbeom Jang, Sejung Yang, ”NonRecursive Cascaded Integrator Comb Decimation Filters With Integer Multiple Factors”, 44th IEEE Midwest Symposium on Circuits and Systems, Volume: 1 , 14-17 Aug. 2001 Yonghong Gao, Lihong Jia, Hannu Tenhunen, ”A Fifth Order Comb Decimation Filter For Multi-standard Transceiver Applications”, IEEE International Symposium on Circuits and Systems, May 28-31,2000,Geneva , Switzerland Brian A White, Mohamed I Elmasry, “Low Power Design of Decimation Filters For A Digital IF Receiver”, IEEE Transactions On Very Large Scale Integration (VLSI) Systems, Vol 8,No3, June 2000 Yonghong Gao, Lihong Jia, Hannu Tenhunen, ”An Improved Architecture and Implementation of Cascaded Integrator Comb Decimation Filters”,IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, 1999 Farbod Behbahani,Yoji Kishigami, John Leete, Asad A Abidi,”CMOS Mixers And Polyphase Filters For Large Image Rejection”, IEEE Journal of Solid State Circuits, Vol 36. No 6, June 2001 James F Kaiser, Richard W Hamming, “Sharpening the Response of A Symmetric Nonrecursive Filter by Multiple Use of the Same Filter”, IEEE Transactions on Acoustics, Speech, And Signal Processing, Vol ASSP 25, No 5, October 1977 Matthias Henker, Tim Hentschel, Gerhard Fettweis, “Time Variant CIC Filters For Sample Rate Conversion With Arbitrary Rational Factors”, The 6th IEEE International Conference on Electronics, Circuits and Systems, Volume: 1 , 5-8 Sept. 1999 Ken Martin, “ Complex Signal Processing is Not Complex”, Conference on European Solid-State Circuits, 2003, 16-18 Sept James C Candy, “Decimation for Sigma Delta Modulation”, IEEE Transactions On Communications, Volume COM 34,No1,January 1986 Alan V Oppenheim , Ronald W Schafer, ”Discrete Time Signal Processing”, Prentice Hall Signal Processing Series Ghosh Anjana, BG Chandrashekar , Venkatraman Srinivasan and Nandy S K, “Decimation For Complex Sigma Delta Analog to Digital Conversion In A Low-IF GPS Receiver”,10th International Symposium On Integrated Circuits, Devices & Systems”, September 2004

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