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An introduction to the efficient 12-pin Spansion HyperBus™ Interface and Spansion HyperFlash™ Memory

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Information about An introduction to the efficient 12-pin Spansion HyperBus™ Interface and...
Technology

Published on February 18, 2014

Author: Spansion

Source: slideshare.net

Description

Spansion® HyperBus™ Interface is a breakthrough that dramatically improves read performance while reducing the number of pins. The efficient 12-pin Spansion HyperBus Interface consists of an 8-pin address/data bus, a differential clock (2 signals), one Chip Select and a Read Data Strobe for the controller, reducing the overall cost of the system. The Spansion HyperBus Interface is being implemented broadly by leading system-on-chip (SoC) manufacturers.

Spansion has developed the first family of products based on this new interface, Spansion HyperFlash™ NOR Memory devices, with read throughput of up to 333 megabytes per second—more than five times faster than ordinary Quad SPI flash currently available with one-third the number of pins of parallel NOR flash.
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Spansion Introduces Breakthrough Interface and World’s Fastest NOR Flash Memory 1 © 2014 Spansion Inc.

Spansion Introduces Breakthrough Interface and World’s Fastest NOR Flash Memory Spansion® HyperBus™ Interface Spansion HyperFlash™ Memory  Dramatically improves read performance while reducing pin-count and board space  Up to 333 megabytes per second read throughput  Supported by major System-on-Chip manufacturers  5X faster performance than ordinary Quad SPI  Applicable to flash, RAM and peripheral devices 2 © 2014 Spansion Inc.  1/3 the pin-count of parallel NOR flash

NOR Innovations Scale to Meet Application Challenges Advances in Performance, Power, Space, Cost, Quality and Features Ease of use 1980 5V 1985 3V 1990 1995 Simul. R/W 1.8V Performance 2000 MirrorBit System Cost Performance 2005 ASP Security 2010 Universal Pinout SPANSION INNOVATIONS 3 © 2014 Spansion Inc. 2015 Fast DDR DLP

Spansion® HyperBus™ Interface – Breakthrough Throughput 350 12 pins 300 MB/S 250 200 150 100 ~45 pins 6 pins 50 6 pins 4 pins 0 Page-mode Page-mode Parallel NOR SPI SPI x1 Ordinary DDR Quad Quad SPISPI Spansion DDR DDR SPI Spansion Quad SPI HyperBus Interface Sustained Read Throughput (MB/s) 4 © 2014 Spansion Inc.

Efficient Bus for Various Memory Types and Peripherals 12-Pin Spansion® HyperBus™ Interface CS# 8-bit I/O Bus Memory or Peripherals System on Chip or Microcontroller CLK CLK# RDS HyperBus Interface  Chip Select (CS#)  8-bit up to 166MHz Double-Data-Rate (DDR) I/O bus for high throughput 5 © 2014 Spansion Inc.  Differential Clock (CLK & CLK#)  Read Data Strobe (RDS) for accurate read data capture by host

“The Spansion HyperBus interface is a powerful advancement on today’s low pin count memory interfaces. The extra functionality and performance is specifically welcome in automotive applications where it allows high-speed, off chip access through a simple low pin count connection. We are pleased to have worked with Spansion during the development of the new HyperBus standard and you’ll see a number of Freescale Microcontrollers appearing in the near future taking advantage of this new interface.” Ray Cornyn Vice President of Product Management Freescale Automotive Microcontrollers business. 6 © 2014 Spansion Inc. CONFIDENTIAL

Introducing Spansion® HyperFlash™ Memory Continuing High-Performance Leadership Spansion HyperFlash Memory 333 MB/s Parallel NOR Spansion 15ns Page = 96 MB/s SPI NOR Spansion DDR 80MHz = 80MB/s All the benefits of Parallel and SPI NOR Flash combined for advanced memory systems 7 © 2014 Spansion Inc.

Spansion® HyperFlash™ Memory: World’s Fastest NOR Flash Compelling Features:  5x the Read Speed of Quad SPI − 333MB/sec VCC = 1.8V − 200MB/sec VCC = 3.0V  96ns Initial Read Access Time  128, 256, 512 Mb densities Space-Saving 8x6mm BGA  Common 24-ball BGA footprint  SPI, QSPI, Dual QSPI or HyperFlash Memory Automotive Temperature  Supports Extended Temp Range  -40°C to 125C° 8 © 2014 Spansion Inc.

Universal Footprint Features Common Pin-Out Scalable Performance and Density in the Same Package Footprint 6mm x 8 mmQuad SPI BGA Dual-Quad 5x5 Memory HyperFlash™ Array Single SPI Memory RSTO# CS2# RESET# INT# RFU RFU One Quad SPI 2nd Quad SPI HyperFlash Memory IO0 to IO3, CK, CS# IO0 to IO3, CK, CS# DQ0 to DQ7, CK, CK#, C S#, RDS More Density Higher Performance 9 © 2014 Spansion Inc. SCK2 CK# SCK1 VSS VCC RFU VSSQ VSS CS1# CS# RDS RFU DQ2 IO2 RFU VCCQ RFU DQ1 IO1 DQ0 IO0 DQ3 IO3 DQ4 IO4 DQ7 IO7 DQ6 IO6 DQ5 IO5 VCCQ VSSQ VIO VSS 160MB/S 333 MB/S 80 128 Mb to 512Mb 256 Mb to 1Gb 128Mb to 1Gb

Simple Transition: Quad SPI to Spansion® HyperFlash™ Memory BGA 6mm x 8mm, 5 x 5 ball footprint Spansion Single Quad SPI Spansion Dual-Quad SPI Spansion HyperFlash Memory CK# VSSQ Quad SPI-1 10 © 2014 Spansion Inc. Quad SPI-2 RFU RFU HyperFlash

HyperFlash™ Memory Applications D-SLR Auto-Cluster Advanced Driver Assistance Systems Solutions for Instant-On and Interactive Graphical User Interface LED Projector Medical Infotainment 11 © 2014 Spansion Inc. Factory Automation

Spansion’s Performance Difference: Faster Boot and Graphics Display Spansion HyperFlash 333MB/s 0.7 sec NAND Spansion SPI 80MB/s 2.8 sec NAND Ordinary SPI 50MB/s 4.2 sec NAND automotive industrial For illustration: Boot to Display = U Boot, Regular Boot, Basic OS, Initial Display Actual Time is Spansion Inc. architectural dependent which can include decompression and RAM shadowing © 2014 system and 12

High-Speed Read Reduces the Need for Compression Sharper, Crisper Images ORIGINAL HIGH COMPRESSION HyperFlash™ Memory 333 MB/s 13 MINOR COMPRESSION Spansion® DDR Quad SPI 80 MB/s Ordinary DDR Quad SPI 50 MB/s © 2014 Spansion Inc.

Spansion Redefines Performance for NOR Flash HyperBus™ Interface High Performance HyperFlash™ Memory Performance  Fast boot  Fast XIP with less DRAM Common footprint and small BGA form factor  With Single and Dual Quad SPI NOR  Performance migration  For space-constrained designs Multiple densities and operating temperatures 14  For many memory types and peripherals  Common interface and package for many densities  easy capacity migration  Automotive temperatures © 2014 Spansion Inc.

www.spansion.com Spansion®, the Spansion logo, MirrorBit®, MirrorBit® Eclipse™, HyperBus™, HyperFlash™ and combinations thereof are trademarks and registered trademarks of Spansion LLC in the United States and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners. This document is for informational purposes only and subject to change without notice. Spansion does not represent that it is complete, accurate or up-to-date; it is provided “AS IS.” To the maximum extent permitted by law, Spansion disclaims any liability for loss or damages arising from use of or reliance on this document. 15 © 2014 Spansion Inc.

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